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Masters student for thesis within FPGA (VHDL) based digital Control-Loop Development for Space Applications (d/f/m)

Job Description:

In order to support Space Applications, Airbus Defence and Space is looking for a

Masters student for thesis within FPGA (VHDL) based digital Control-Loop Development for Space Applications (d/f/m)

You are looking for a master thesis? Then apply now! We look forward to you supporting us in the TSEAO-TL2 Team as a Masters student (d/f/m)!

  • Location: Friedrichshafen

  • Start: April 2024

  • Duration: 6 Months 

We are looking for a highly motivated and enthusiastic student for the above master thesis position educated in related fields such as digital signal processing, electronics or physics, with a strong passion for high performance FPGA development. This exciting opportunity involves working in our laboratory for enabling technology on the pre-development of a solid-state laser system for space applications. As a master student who passed all courses, you will join a dynamic team of scientific engineers dedicated to pushing the boundaries of precision optical instruments and its applications for space.

Your location

At the Airbus site in Friedrichshafen you will be working on innovation where others spend their holidays. Enjoy panoramic views of Lake Constance while having lunch in our canteen. And after work, join one of our many corporate sports groups to go running, sailing or skiing.

Your benefits

  • Attractive salary and work-life balance with an 35-hour week (flexitime).

  • International environment with the opportunity to network globally.

  • Work with modern/diversified technologies.

  • At Airbus, we see you as a valuable team member and you are not hired to brew coffee, instead you are in close contact with the interfaces and are part of our weekly team meetings.

  • Opportunity to participate in the Generation Airbus Community to expand your own network.

Your tasks and responsibilities

  • Conduct VHDL-code and C-code development on an existing and ready-to-use development system (High performance Xilinx FPGA and DAC/ADC development system).

  • Optimisation of the code for performance and control loop bandwidth.

  • Design, assembly, test, and optimisation of interface electronics on PCB prototypes for analogue and digital electronics between experimental setup and FPGA DAC and ADC.

  • Investigation and characterization of FPGA system and closed-loop control architecture performance.

  • Evaluation and implementation of different control loop architectures based on your in-depth control loop evaluation activity (analytical investigation and numerical simulation).

  • Collaborate with an interdisciplinary team to develop novel techniques and methodologies.

  • Perform data analysis, numerical simulations, and statistical modeling to interpret experimental results.

  • Documenting your work and results as a recipe for future work.

 Desired skills and qualifications

  • Enrolled in a Master's degree program (or equivalent) in the field of signal processing, electronics, physics or a related field.

  • Demonstrated practical development experience in the frame of FPGA/VHDL code development with Xilinx is mandatory and preferably in the context of closed loop control development and implementation.

  • Practical programming skills (VHDL, C++, MATLAB or Python, etc.) are an essential asset.

  • Control theory background to perform analytical evaluations and optimisation is favourable.

  • Strong analytical and problem-solving skills, with the ability to think critically and propose innovative solutions.

  • Proficiency in experimental techniques, data acquisition, and analysis tools.

  • Strong written and verbal communication skills, with the ability to present research findings and problems effectively.

  • Ability to work independently as well as collaboratively in a team-oriented environment.

Please upload the following documents: cover letter, CV, relevant transcripts, enrollment certificate. 

Not a 100% match? No worries! Airbus supports your personal growth.

Take your career to a new level and apply online now!

This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the Company’s success, reputation and sustainable growth.

Company:

Airbus Defence and Space GmbH

Employment Type:

Final-year Thesis

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Experience Level:

Student

Job Family:

By submitting your CV or application you are consenting to Airbus using and storing information about you for monitoring purposes relating to your application or future employment. This information will only be used by Airbus.
Airbus is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief.

Airbus is, and always has been, committed to equal opportunities for all. As such, we will never ask for any type of monetary exchange in the frame of a recruitment process. Any impersonation of Airbus to do so should be reported to emsom@airbus.com.

At Airbus, we support you to work, connect and collaborate more easily and flexibly. Wherever possible, we foster flexible working arrangements to stimulate innovative thinking.

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Masters student for thesis within FPGA (VHDL) based digital Control-Loop Development for Space Applications (d/f/m)

Friedrichshafen
Vollzeit, Befristet

Veröffentlicht am 02.02.2024

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